Stanford Seminar - MIPS Open



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Saraj Mudigonda and Majid Bemanian Wave Computing May 1, 2019 During this session, the speakers will provide an overview of Wave Computing's MIPS Open initiative, including details on the program components, how they can be used to design edge SoCs, licensing terms, the design certification process, etc. Mr. Bemanian will also give a demonstration of how to use various program components for real-world example implementations. Wave Computing released the first MIPS Open program components at the end of March, providing free access to the MIPS RISC architecture without license fees or royalties. The new MIPS Open online environment is live and immediately accessible at www.mipsopen.com. Specific components in the first program release include: - MIPS Instruction Set Architecture: A downloadable copy of the latest version of the MIPS 32/64-bit ISA, SIMD, DSP, Multithreading and Virtualization - MIPS Open Toolsi: Integrated Development Environment for embedded real-time operating systems and Linux-based systems for embedded products - MIPS Open FPGAs: A complete training program including labs, SoC tutorials and sample (non-commercial) RTL code - MIPS Open Cores: low power, low footprint microAptiv Microprocessor(MPU) and Microcontroller (MCU) cores targeted for embedded applications Historical Note The MIPS Architecture and processor was originally developed in the Computer Systems Laboratory at Stanford by a team headed by John Hennessey. MIPS and the UC Berkeley developed SPARC archicture were quintessential RISC architectures: influential, popular, and heavily studied. View the full playlist: https://www.youtube.com/playlist?list=PLoROMvodv4rMWw6rRoeSpkiseTHzWj6vu 0:00 Introduction 0:46 It all started here!!! 2:09 MIPS Open Timeline 3:21 MIPS Open Components 4:05 Download Packages 4:27 MIPS Open Architecture Download Package 5:44 MIPS Open Cores Download Package 7:48 MIPS Open Tools Package 8:20 MIPS Open FPGA Download Package 8:56 Summary of the MIPS Open Architecture License 10:57 MIPS Open Development 12:03 MIPS Open Features 12:48 MIPS Open Benefits 23:41 Virtualization and HW multi-threading in action 28:31 Multi-threading = Performance & efficiency 35:16 Using MT to eliminate interrupt response time 39:06 Virtualization Execution Mode 44:35 Privileged Management 46:35 Security & Reliability 49:56 MSA: SIMD Features 53:37 Multi-Threading DSP Acceleration

Published by: Stanford Online Published at: 4 years ago Category: آموزشی